Attachment 359652 Details for Bug 190751 – Patch

[patch] Patch

bug-190751-20190120145119.patch (text/plain), 5.49 KB, created by Yusuke Suzuki on 2019-01-20 14:51:20 PST

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Creator: Yusuke Suzuki

Created: 2019-01-20 14:51:20 PST

Size: 5.49 KB

patch

obsolete

>Subversion Revision: 240217
>diff --git a/Source/JavaScriptCore/ChangeLog b/Source/JavaScriptCore/ChangeLog
>index 8e9e5844a8e04cf906fddea1329e58b3d3c7ccd2..ce5587c9472520dcf95907399a732bf0240e06e3 100644
>--- a/Source/JavaScriptCore/ChangeLog
>+++ b/Source/JavaScriptCore/ChangeLog
>@@ -1,3 +1,22 @@
>+2019-01-20  Yusuke Suzuki  <yusukesuzuki@slowstart.org>
>+
>+        [JSC] sub op with 0 should be optimized
>+        https://bugs.webkit.org/show_bug.cgi?id=190751
>+
>+        Reviewed by NOBODY (OOPS!).
>+
>+        LLInt sometimes emit `subp 0, %rxx`. For example, `maxFrameExtentForSlowPathCall` is 0 in X86_64, ARM64, and ARM64E.
>+        So `subp maxFrameExtentForSlowPathCall sp` becomes `subp 0, %rsp`. While `addp 0, %rsp` is removed in offlineasm,
>+        sub operation does not have such an optimization. This patch applies the same optimization to sub operation already
>+        done in add operation. Since the CPU flags changed in offlineasm's these operations are not considered (if these flags
>+        are required, we use special branch operations instead), this optimization is sane.
>+
>+        One problem is that zero-extension of the 32bit register in 64bit architecture. If the instruction emission is skipped,
>+        this won't be happen. Currently, we align our sub to add operation: we skip emission in this case.
>+
>+        * offlineasm/arm64.rb:
>+        * offlineasm/x86.rb:
>+
> 2019-01-20  Yusuke Suzuki  <yusukesuzuki@slowstart.org>
> 
>         [JSC] Shrink data structure size in JSC/heap
>diff --git a/Source/JavaScriptCore/offlineasm/arm64.rb b/Source/JavaScriptCore/offlineasm/arm64.rb
>index 0c92eb2fe0681baa64fbded8f468de003771b3b4..28d0f9a1c9872b6299bbee2c7240b760804eef0d 100644
>--- a/Source/JavaScriptCore/offlineasm/arm64.rb
>+++ b/Source/JavaScriptCore/offlineasm/arm64.rb
>@@ -460,7 +460,7 @@ def emitARM64Add(opcode, operands, kind)
>         raise unless operands[2].register?
>         
>         if operands[0].immediate?
>-            if operands[0].value == 0 and flag !~ /s$/
>+            if operands[0].value == 0 and opcode !~ /s$/
>                 unless operands[1] == operands[2]
>                     $asm.puts "mov #{arm64FlippedOperands(operands[1..2], kind)}"
>                 end
>@@ -496,6 +496,30 @@ def emitARM64Mul(opcode, operands, kind)
>     $asm.puts "madd #{arm64TACOperands(operands, kind)}, #{arm64GPRName('xzr', kind)}"
> end
> 
>+def emitARM64Sub(opcode, operands, kind)
>+    if operands.size == 3
>+        raise unless operands[0].register?
>+        raise unless operands[2].register?
>+
>+        if operands[1].immediate?
>+            if operands[1].value == 0 and opcode !~ /s$/
>+                unless operands[0] == operands[2]
>+                    $asm.puts "mov #{arm64FlippedOperands([operands[0], operands[2]], kind)}"
>+                end
>+                return
>+            end
>+        end
>+    end
>+
>+    if operands.size == 2
>+        if operands[0].immediate? and operands[0].value == 0 and opcode !~ /s$/
>+            return
>+        end
>+    end
>+
>+    emitARM64TAC(opcode, operands, kind)
>+end
>+
> def emitARM64Unflipped(opcode, operands, kind)
>     $asm.puts "#{opcode} #{arm64Operands(operands, kind)}"
> end
>@@ -655,13 +679,13 @@ def lowerARM64
>         when "mulq"
>             emitARM64Mul('mul', operands, :quad)
>         when "subi"
>-            emitARM64TAC("sub", operands, :word)
>+            emitARM64Sub("sub", operands, :word)
>         when "subp"
>-            emitARM64TAC("sub", operands, :ptr)
>+            emitARM64Sub("sub", operands, :ptr)
>         when "subq"
>-            emitARM64TAC("sub", operands, :quad)
>+            emitARM64Sub("sub", operands, :quad)
>         when "subis"
>-            emitARM64TAC("subs", operands, :word)
>+            emitARM64Sub("subs", operands, :word)
>         when "negi"
>             $asm.puts "sub #{operands[0].arm64Operand(:word)}, wzr, #{operands[0].arm64Operand(:word)}"
>         when "negp"
>diff --git a/Source/JavaScriptCore/offlineasm/x86.rb b/Source/JavaScriptCore/offlineasm/x86.rb
>index 5b5e9a015a8e3a0b922c2f3b4a589403fc07bf9f..804708f4042d9af3ec2fdfcb1675bad2d5c7f095 100644
>--- a/Source/JavaScriptCore/offlineasm/x86.rb
>+++ b/Source/JavaScriptCore/offlineasm/x86.rb
>@@ -787,12 +787,29 @@ def handleX86Add(kind)
>     end
>     
>     def handleX86Sub(kind)
>-        if operands.size == 3 and operands[1] == operands[2]
>-            $asm.puts "neg#{x86Suffix(kind)} #{operands[2].x86Operand(kind)}"
>-            $asm.puts "add#{x86Suffix(kind)} #{orderOperands(operands[0].x86Operand(kind), operands[2].x86Operand(kind))}"
>-        else
>-            handleX86Op("sub#{x86Suffix(kind)}", kind)
>+        if operands.size == 3
>+            if Immediate.new(nil, 0) == operands[1]
>+                raise unless operands[0].is_a? RegisterID
>+                raise unless operands[2].is_a? RegisterID
>+                unless operands[0] == operands[2]
>+                    $asm.puts "mov#{x86Suffix(kind)} #{orderOperands(operands[0].x86Operand(kind), operands[2].x86Operand(kind))}"
>+                end
>+                return
>+            end
>+            if operands[1] == operands[2]
>+                $asm.puts "neg#{x86Suffix(kind)} #{operands[2].x86Operand(kind)}"
>+                $asm.puts "add#{x86Suffix(kind)} #{orderOperands(operands[0].x86Operand(kind), operands[2].x86Operand(kind))}"
>+                return
>+            end
>         end
>+
>+        if operands.size == 2
>+            if Immediate.new(nil, 0) == operands[0]
>+                return
>+            end
>+        end
>+
>+        handleX86Op("sub#{x86Suffix(kind)}", kind)
>     end
>     
>     def handleX86Mul(kind)

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Attachments on bug 190751: 352779 | 359652 | 359653